PCIe Benefits From AI, Despite Scaling Protocols
Original reporting by Semiconductor Engineering
The explosive growth of AI has spurred the development of specialized interconnects, designed to handle the unprecedented data traffic in modern data centers. For years, Peripheral Component Interconnect Express (PCIe) has been the ubiquitous backbone for connecting processors to devices. The emergence of high-speed alternatives like UALink and enhanced Ethernet might suggest PCIe's role in AI is diminishing, as the spotlight shines on networks built specifically for GPU-centric scale-up and scale-out architectures.
PCIe's Enduring Relevance
However, a deeper look reveals that PCIe is not retreating but rather adapting and strengthening its position within the AI ecosystem. It remains critical for non-AI processing and, crucially, acts as the vital link between CPUs and accelerators in scale-out architectures. Moreover, the rise of "agentic AI," which relies heavily on CPU decision-making alongside GPU inference, significantly expands PCIe’s role. Even for some scale-up scenarios, its widespread adoption and cost-effectiveness make it a compelling choice. Simultaneously, Compute Express Link (CXL), which leverages PCIe's physical layer, is moving past its slow start. Initially viewed with skepticism, CXL is now gaining traction for memory extension and pooling, with new switches entering the market and developers finding clear use cases. Far from being supplanted, both PCIe and CXL are evolving with rapid specification updates and extended reach, cementing their ongoing importance in the complex and expanding landscape of AI infrastructure.
PCIe, far from being sidelined by the demanding interconnect needs of modern AI, is proving remarkably resilient and adaptable. Its foundational role in connecting CPUs to accelerators and network interface cards ensures its continued relevance in scale-out architectures and is seeing a renewed emphasis with the rise of agentic AI, which requires more sophisticated CPU-GPU interaction. Even in scale-up scenarios, where specialized alternatives exist, PCIe's ubiquity and evolving performance make it a practical and often preferred option for many implementations. The ongoing rapid advancements, with new PCIe generations like 7.0 and 8.0 pushing bandwidth limits, underscore its persistent strategic importance across the computing spectrum.
A Stratified Interconnect Future
Meanwhile, CXL, leveraging PCIe's physical layer, is steadily gaining momentum, particularly in memory extension and pooling applications. While its adoption has been deliberate, the maturing ecosystem, increasing availability of switches, and clear use cases, especially with the growing demands of diverse AI workloads, point to CXL becoming a significant component in future server designs. The broader implication for the industry is an increasingly sophisticated and stratified interconnect landscape. Rather than a single dominant technology, the future will feature a suite of specialized protocols—from MIPI at the edge to UALink for high-end GPU clusters—each optimized for specific tasks. These specialized solutions will coexist with, and often rely on, the foundational strength and versatility of PCIe and CXL for general-purpose connectivity and resource sharing. This evolution promises more efficient, flexible, and scalable computing environments, underpinning the next wave of AI innovation across the data center and the ever-expanding intelligent edge.